1. Technical Field
The present invention relates to an improved method of interference cancellation for use with code division multiple access (CDMA) communication techniques.
2. Background Art
Multiuser communications systems that employ CDMA exhibit a limit on the number of users that can simultaneously communicate over a channel and maintain a specified level of performance per user. This limitation is caused by the domination by other user interference over the additive thermal noise. In general, solutions to this limitation have employed either optimum detection or interference cancellation methods.
One advantageous approach to interference cancellation ("IC") has been the parallel processing of multiuser interference to simultaneously remove from each user the total interference produced by the remaining users accessing the channel as described by, for example, "Cascaded co-channel interference cancelling and diversity combining for spread-spectrum multiaccess over multipath fading channels", by Yoon, Kohno, and Imai, Symposium on Information Theory and its Applications, Sep. 8-11, 1992. This approach allows each user in the system to receive equal treatment in any attempt to completely cancel his multiple user interference. In addition, the delay required to complete a parallel IC operation is only a single bit time, as compared to serial IC methods that require a delay on the order of the number of users multiplied by the bit time as described by, for example, U.S. Pat. No. 5,218,619, issued Jun. 8, 1993 to Paul W. Dent.
A complex baseband model of a prior art parallel IC method is shown in FIG. 1 having L cancellation stages, where k is the number of each stage. A composite signal consists of a series of coded signals from users 1 through M, each used to modulate an RF carrier using conventional modulation techniques, such as phase shift keying. Antenna 100 receives the composite signal, from which the complex carrier of frequency .omega. and zero phase angle is removed by demodulator 105 to produce a baseband signal r(t). For each user m equal to 1 through M, the unique code PN(m) used to modulate the signal in the user transmitter, for example PN1, is mixed by mixer 110 with a carrier phase -.phi. assigned by the receiver to that user, for example phase -.phi.1, to form a composite signal v(k,m). Demodulator 115, which is a conventional multiplier, decodes or despreads the signal received from, for example user 1, by multiplying the baseband signal r(t) by the user code, for example PN1. In addition, demodulator 115 demodulates signal r(t) by the carrier phase assigned to this user, for example .phi.1. The signals used to demodulate are generated by conventional coherent reception methods employing, for example, carrier synchronization loop techniques.
The resulting signal u(k,m) consists of the despread, demodulated signal s(m) received from a user, for example s(1) plus interference signals from all other users that each consists of the user's coded signal multiplied by PN1 and exp(-j.phi.1). The signals u(k,m) and v(k,m) for each user are then input into the first parallel cancellation stage for which k is equal to 1. As explained previously, each parallel cancellation stage requires only one bit time, or Tb, causing each stage to be delayed by the product of the number of previous stages and Tb.
The outputs of the final stage L, namely the series of signals u(L,m) for each value of m equal to 1 through M are processed by an output filter 120 and a final decision device 125, which is a hard limiter (the use of which is described below).
Each stage of IC, for example stage k, consists of the processing steps shown in FIG. 2. The signal u(k,m) is processed for each user by a matched filter 150 (for example, an integrate-and-dump circuit for a rectangular pulse shape) to produce a maximum signal-to-noise ratio (SNR) at its output. For example, the signal u(1,1), i.e. for user 1 at the first stage, will be dominated by the user signal s(1) because it is the only user signal that has been despread in the signal u(1,1). The output of matched filter 150 corresponding to u(1,1) is analyzed by a decision device 155 to make a tentative decision concerning the bit polarity of the user signal, for example s(1). In prior art parallel IC systems, the decision device 155 consisted of a hard limiter, or one-bit quantizer, the transfer characteristics of which are shown in FIG. 3, which may be referred to as a hard decision output. For example, if the output of the matched filter 150 is a positive voltage of 0.67, a hard limiter decision device would indicate s(1) has a bit polarity of +1. Thus, if a hard limiter were used as the decision device 155 (shown in FIG. 2), FIG. 2 would represent prior art.
Returning to FIG. 2, the output of the decision device 155 is remodulated and respread by modulator 160, which is a conventional multiplier, with a signal that consists of signal v(k,m) after processing by a time delay circuit 165 and a complex conjugate circuit 170, which produces the conjugate of carrier phase -.phi.1, i.e. .phi.1. Thus, except for amplitude, the output of modulator 160 is a recreation of an estimate of the baseband signal transmitted by each user. To complete the recreation of an estimate of s(1), a rescaling amplifier 175 amplifies the signal with an estimate of the transmitted power of s(1).
Estimates of all transmitted signals are simultaneously recreated in the same manner in each stage k. To cancel out other user interference, recreated signals from all users except the one of interest are summed and subtracted from the baseband signal r(t). For example, the recreated signals for users 2 through M are added in a signal summer 180 and subtracted in a baseband summer 185 from the baseband signal r(t), which has been delayed for one bit time Tb by baseband delay circuit 190. The output signal of the baseband summer 185 is then demodulated in output modulator 190 with a signal consisting of the appropriate user code, for example PN1, and the complex conjugate, for example -.phi.1, of the carrier phase .phi. used in modulator 160, which is produced by an output complex conjugate circuit 195. The outputs of stage k are, for each user signal, a signal (for example u(k,1)) which is an estimate of the user's transmitted signal and a signal (for example v(k,1)) which is a mixture of the user's code and an assigned user carrier phase.
This method attempts to fully cancel the multiuser interference at each stage L of the IC device. This type of parallel IC processing may be referred to as "brute force" cancellation and has a major shortcoming in that it performs this cancellation operation without regard to the quality of the interference knowledge. In the early stages of IC, the interference estimate may be poor because of low signal-to-interference plus noise ratio, and it may be preferable not to use the estimate to cancel interference. For example, if the transmitted bit polarity is a +1 and if the output of matched filter 150 (as shown in FIG. 2) for user 1 is a small negative value such as -0.4, the decision device shown in FIG. 3 may mistakenly indicate a -1 bit polarity. This effectively adds interference in the IC method rather than removing it. In addition, brute force cancellation fails to take advantage of the fact that as the IC operation progresses by stages, the estimates of the multiuser interference improve and should be given more weight in later stages.